Analog-to-digital converters (ADCs) are used in many state of the art applications in order to convert a signal from the analog domain to the digital domain. The signal-to-noise-ratio (SNR) achieved by the ADC generally determines the signal-to-noise-ratio of the host electronic system that includes the ADC. Therefore ADCs are crucial components of electronic systems.
The signal-to-noise-ratio of conventional ADCs has been improved through the use of increasing power consumption of the ADC and increasing the size of critical transistors included in the ADC. However, the increased chip size which results from increases in the power consumption and increases in the size of ADC transistors results in increased cost of the ADC chips. State of the art systems generally also include a digital filter that follows the ADC in the signal path of the host electronic system. The digital filter limits the bandwidth of the system output to the frequency range in which interesting input signals can occur. Consequently, there is a need for systems and methods that reduce the power consumption and the chip size of a signal processing system at a given specified signal-to-noise ratio in comparison to state of the art systems.